European Conference on Trapped Ions (ECTI)

We have built a microfabricated surface trap with integrated chip capacitors for quantum computation and simulation experiments. The trap features two loading zones at both sides for isotope selection and a central quantum operation region. We fabricate a series of parallel plate capacitors on chip with each capacitance around 800 pF to shunt the pick-up RF noise to the ground. The trap is attached on top of the capacitor chip and then standardized on a 100-pin CPGA architecture.

We have successfully trapped Yb+ ions on this surface trap. After optimization of trapping parameters, the lifetime of a single ion is up to several hours. The heating rate is around 200 quanta per second while the trap center is about 108 microns above the chip surface and the secular frequency is about 2.1 MHz.